Equivalent distributed capacitance model of oxide traps on frequency dispersion of <italic>C</italic>–<italic>V</italic> curve for MOS capacitors

Equivalent distributed capacitance model of oxide traps on frequency dispersion of C–V curve for MOS capacitors

Lu Han-Han¹, Xu Jing-Ping¹, Liu Lu^{1, †,}, Lai Pui-To^{2, ‡,}, Tang Wing-Man³

Comparison between simulated results (solid line) and experimental data (symbols) for a Pt/5-nm Al₂O₃/n-InGaAs MOS device with the gate biased at 2.9 V (open circles) and 0.3 V (open squares).