Effect of NO annealing on charge traps in oxide insulator and transition layer for 4H-SiC metal–oxide–semiconductor devices
Jia Yifan1, Lv Hongliang1, †, , Niu Yingxi2, Li Ling2, Song Qingwen1, 3, Tang Xiaoyan1, ‡, , Li Chengzhan4, Zhao Yanli4, Xiao Li5, Wang Liangyong5, Tang Guangming5, Zhang Yimen1, Zhang Yuming1
       

Bidirectional capacitance–voltage characteristics of the samples annealed in Ar and NO ambiences at 10 kHz for the first measurement, in which the arrows indicate the voltage sweep directions.