Controllable all-optical stochastic logic gates and their delay storages based on the cascaded VCSELs with optical-injection
Zhong Dongzhou†, , Luo Wei, Xu Geliang
       

Hysteresis cycles as a function of the detuning frequency between the CW laser and the M-VCSEL, Δω. Here, μM = μS = 1.2; KMx = KMy = 10 ns−1; KSx = KSy = 50 ns−1; Einj = 0.6, T = 10 ns. The red solid line indicates the intensity of the x-polarization, the blue dashed line is that of the y-polarization. Panels (a) and (b) show the hysteresis cycles from the PPLN crystal output when E0 = 0 kV/mm and E0 = 85 kV/mm, respectively. Panels (c) and (d) show the hysteresis cycles from the S-VCSEL output when E0 = 0 kV/mm and E0 = 85 kV/mm, respectively. The arrows indicate the three levels used to encode the logic inputs (see text for details).