Improvement in the electrical performance and bias-stress stability of dual-active-layered silicon zinc oxide/zinc oxide thin-film transistor

Liu Yu-Rong^{1, 2, †,}, Zhao Gao-Wei¹, Lai Pai-To³, Yao Ruo-He^{1, 2}

Transfer characteristics of the ZnO-based TFTs with single- and dual-active-layer structures at V_DS = 30 V under a gate-bias stress of 20 V. Panel (a) is for the single-layered ZnO structure, panel (b) the single-layered SZO structure, and panel (c) the double-layered SZO/ZnO structure.