Temperature- and voltage-dependent trap generation model in high-<italic>k</italic> metal gate MOS device with percolation simulation

Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

Xu Hao, Yang Hong, Wang Yan-Rong, Wang Wen-Wu^†,, Luo Wei-Chun, Qi Lu-Wei, Li Jun-Feng, Zhao Chao, Chen Da-Peng, Ye Tian-Chun

Plots of simulated T_BD versus initial trap generation rate R₀. A constant power exponent factor −s is independent of dielectric thickness.