Novel substrate trigger SCR-LDMOS stacking structure for high-voltage ESD protection application
Ma Jin-Rong, Ming Qiao†, Zhang Bo
       
Simulated TLP I – V characteristics of (a) the conventional SCR- LDMOS stacking structure, (b) the proposed STSCR-LDMOS stacking structure with R 1 = R 2 = R n = 100 Ω.