中国物理B ›› 2016, Vol. 25 ›› Issue (2): 27702-027702.doi: 10.1088/1674-1056/25/2/027702
• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇 下一篇
Ji-Bin Fan(樊继斌), Xiao-Fu Ding(丁晓甫), Hong-Xia Liu(刘红侠), Peng-Fei Xie(谢鹏飞), Yuan-Tao Zhang(张袁涛), Qing-Liang Liao(廖清良)
Ji-Bin Fan(樊继斌)1,2, Xiao-Fu Ding(丁晓甫)1, Hong-Xia Liu(刘红侠)2, Peng-Fei Xie(谢鹏飞)1, Yuan-Tao Zhang(张袁涛)1, Qing-Liang Liao(廖清良)1
摘要: High-κ/Ge gate stack has recently attracted a great deal of attention as a potential candidate to replace planar silicon transistors for sub-22 generation. However, the desorption and volatilization of GeO hamper the development of Ge-based devices. To cope with this challenge, various techniques have been proposed to improve the high-κ/Ge interface. However, these techniques have not been developed perfectly yet to control the interface. Therefore, in this paper, we propose an improved stress relieved pre-oxide (SRPO) method to improve the thermodynamic stability of the high-κ/Ge interface. The x-ray photoelectron spectroscopy (XPS) and atomic force microscopy (AFM) results indicate that the GeO volatilization of the high-κ/Ge gate stack is efficiently suppressed after 500 ℃ annealing, and the electrical characteristics are greatly improved.
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