A novel circuit design for complementary resistive switch-based stateful logic operations

Wang Xiao-Ping^{1, 2, †,}, Chen Lin^{1, 2}, Shen Yi^{1, 2}, Xu Bo-Wen^{1, 2}

The CRS NAND operation simulation results: (a) the state of CRS_P1, (b) the state of CRS_P2, and (c) the state of latched cell CRS_Q. (a-1), (b-1), (c-1) Case 1; (a-2), (b-2), (c-2) Case 2; (a-3), (b-3), (c-3) Case 3; (a-4), (b-4), (c-4) Case 4.