An ultra-low specific on-resistance trench LDMOS with a U-shaped gate and accumulation layer*
Li Peng-Cheng, Xiao-Rong Luo†, Luo Yin-Chun, Zhou Kun, Shi Xian-Long, Zhang Yan-Hui, Lv Meng-Shan
       
Flow line distributions of (a) UG LDMOS (12.4 mΩ·cm2) and (b) CT LDMOS (346.6 mΩ·cm2) (5 × 10−8 A·μm−1/contour) with the optimal doping concentration of the drift region. (c) Current density distributions under the source ( y = 10.0 μm).