Metal/semiconductor memristive heterostructures have potential applications in nonvolatile memory and computing devices. To enhance the performance of the memristive devices, it requires a comprehensive engineering to the metal/semiconductor interfaces. Here in this paper, we discuss the effects of oxygen vacancies and temperature on the memristive behaviors of perovskite-oxide Schottky junctions, each consisting of SrRuO3 thin films epitaxially grown on Nb:SrTiO3 substrates. The oxygen partial pressure and laser fluence are controlled during the film growth to tune the oxygen defects in SrRuO3 films, and the Schottky barrier height can be controlled by both the temperature and oxygen vacancies. The resistive switching measurements demonstrate that the largest resistance switching ratio can be obtained by controlling oxygen vacancy concentration at lower temperature. It suggests that reducing Schottky barrier height can enhance the resistive switching performance of the SrRuO3/Nb:SrTiO3 heterostructures. This work can conduce to the development of high-performance metal-oxide/semiconductor memristive devices.
We analyze the energy aspects of single and coupled Hindmarsh-Rose (HR) neuron models with a quadratic flux controlled memristor. The energy function for HR neuron with memristor has been derived and the dynamics have been analyzed in the presence of various external stimuli. We found that the bursting mode of the system changes with external forcing. The negative feedback in Hamilton energy function effectively stabilizes the chaotic trajectories and controls the phase space. The Lyapunov exponents have been plotted to verify the stabilization of trajectories. The energy aspects during the synchronous dynamics of electrically coupled neurons have been analyzed. As the coupling strength increases, the average energy fluctuates and stabilizes at the point of synchronization. When the neurons are coupled via chemical synapse, the average energy variations show three important regimes:a fluctuating regime corresponding to the desynchronized, a stable region indicating synchronized and a linearly increasing regime corresponding to the amplitude death states have been observed. The synchronization transitions are verified by plotting the transverse Lyapunov exponents. The proposed method has a large number of applications in controlling coupled chaotic systems and in analyzing the energy change during various metabolic processes.
Synapse emulation is very important for realizing neuromorphic computing, which could overcome the energy and throughput limitations of today's computing architectures. Memristors have been extensively studied for using in nonvolatile memory storage and neuromorphic computing. In this paper, we report the fabrication of vertical sandwiched memristor device using ultrathin quasi-two-dimensional gallium oxide produced by squeegee method. The as-fabricated two-terminal memristor device exhibited the essential functions of biological synapses, such as depression and potentiation of synaptic weight, transition from short time memory to long time memory, spike-timing-dependent plasticity, and spike-rate-dependent plasticity. The synaptic weight of the memristor could be tuned by the applied voltage pulse, number, width, and frequency. We believe that the injection of the top Ag cations should play a significant role for the memristor phenomenon. The ultrathin of medium layer represents an advance to integration in vertical direction for future applications and our results provide an alternative way to fabricate synaptic devices.
Memristors, as memristive devices, have received a great deal of interest since being fabricated by HP labs. The forgetting effect that has significant influences on memristors' performance has to be taken into account when they are employed. It is significant to build a good model that can express the forgetting effect well for application researches due to its promising prospects in brain-inspired computing. Some models are proposed to represent the forgetting effect but do not work well. In this paper, we present a novel window function, which has good performance in a drift model. We analyze the deficiencies of the previous drift diffusion models for the forgetting effect and propose an improved model. Moreover, the improved model is exploited as a synapse model in spiking neural networks to recognize digit images. Simulation results show that the improved model overcomes the defects of the previous models and can be used as a synapse model in brain-inspired computing due to its synaptic characteristics. The results also indicate that the improved model can express the forgetting effect better when it is employed in spiking neural networks, which means that more appropriate evaluations can be obtained in applications.
Properties that are similar to the memory and learning functions in biological systems have been observed and reported in the experimental studies of memristors fabricated by different materials. These properties include the forgetting effect, the transition from short-term memory (STM) to long-term memory (LTM), learning-experience behavior, etc. The mathematical model of this kind of memristor would be very important for its theoretical analysis and application design. In our analysis of the existing memristor model with these properties, we find that some behaviors of the model are inconsistent with the reported experimental observations. A phenomenological memristor model is proposed for this kind of memristor. The model design is based on the forgetting effect and STM-to-LTM transition since these behaviors are two typical properties of these memristors. Further analyses of this model show that this model can also be used directly or modified to describe other experimentally observed behaviors. Simulations show that the proposed model can give a better description of the reported memory and learning behaviors of this kind of memristor than the existing model.
Memristive technology has been widely explored, due to its distinctive properties, such as nonvolatility, high density, versatility, and CMOS compatibility. For memristive devices, a general compact model is highly favorable for the realization of its circuits and applications. In this paper, we propose a novel memristive model of TiOx-based devices, which considers the negative differential resistance (NDR) behavior. This model is physics-oriented and passes Linn's criteria. It not only exhibits sufficient accuracy (IV characteristics within 1.5% RMS), lower latency (below half the VTEAM model), and preferable generality compared to previous models, but also yields more precise predictions of long-term potentiation/depression (LTP/LTD). Finally, novel methods based on memristive models are proposed for gray sketching and edge detection applications. These methods avoid complex nonlinear functions required by their original counterparts. When the proposed model is utilized in these methods, they achieve increased contrast ratio and accuracy (for gray sketching and edge detection, respectively) compared to the Simmons model. Our results suggest a memristor-based network is a promising candidate to tackle the existing inefficiencies in traditional image processing methods.
The complex derivative Dα±jβ, with α, β∈R+ is a generalization of the concept of integer derivative, where α=1, β=0. Fractional-order electric elements and circuits are becoming more and more attractive. In this paper, the complex-order electric elements concept is proposed for the first time, and the complex-order elements are modeled and analyzed. Some interesting phenomena are found that the real part of the order affects the phase of output signal, and the imaginary part affects the amplitude for both the complex-order capacitor and complex-order memristor. More interesting is that the complex-order capacitor can do well at the time of fitting electrochemistry impedance spectra. The complex-order memristor is also analyzed. The area inside the hysteresis loops increases with the increasing of the imaginary part of the order and decreases with the increasing of the real part. Some complex case of complex-order memristors hysteresis loops are analyzed at last, whose loop has touching points beyond the origin of the coordinate system.
Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch (CRS)-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits.
The memtranstor has been proposed to be the fourth fundamental circuit memelement in addition to the memristor, memcapacitor, and meminductor. Here, we demonstrate the memtranstor behavior at room temperature in a device made of the magnetoelectric hexaferrite (Ba0.5Sr1.5Co2Fe11AlO22) where the electric polarization is tunable by external magnetic field. This device shows a nonlinear q-φ relationship with a butterfly-shaped hysteresis loop, in agreement with the anticipated memtranstor behavior. The memtranstor, like other memelements, has a great potential in developing more advanced circuit functionalities.
As commercial memristors are still unavailable in the market, mathematic models and emulators which can imitate the features of the memristor are meaningful for further research. In this paper, based on the analyses of characteristics of the q-φ curve, an exponential flux-controlled model, which has the quality that its memductance (memristance) will keep monotonically increasing or decreasing unless the voltage’s polarity reverses (if not approach the boundaries), is constructed. A new approach to designing the floating emulator of the memristor is also proposed. This floating structure can flexibly meet various demands for the current through the memristor (especially the demand for a larger current). The simulations and experiments are presented to confirm the effectiveness of this model and its floating emulator.
We investigate the resistive switching and ferroelectric polarization properties of high-quality epitaxial BiFeO3 thin films in various temperature ranges. The room temperature current-voltage (I-V) curve exhibits a well-established polarization-modulated memristor behavior. At low temperatures (< 253 K), the I-V curve shows an open circuit voltage (OCV), which possibly originates from the dielectric relaxation effects, accompanied with a current hump due to the polarization reversal displacement current. While at relative higher temperatures (> 253 K), the I-V behaviors are governed by both space-charge-limited conduction (SCLC) and Ohmic behavior. The polarization reversal is able to trigger the conduction switching from Ohmic to SCLC behavior, leading to the observed ferroelectric resistive switching. At a temperature of >298 K, there occurs a new resistive switching hysteresis at high bias voltages, which may be related to defect-mediated effects.
The memristor, as the fourth basic circuit element, has drawn worldwide attention since its physical implementation was released by HP Labs in 2008. However, at the nano-scale, there are many difficulties for memristor physical realization. So a better understanding and analysis of a good model will help us to study the characteristics of a memristor. In this paper, we analyze a possible mechanism for the switching behavior of a memristor with a Pt/TiO2/Pt structure, and explain the changes of electronic barrier at the interface of Pt/TiO2. Then, a quantitative analysis about each parameter in the exponential model of memristor is conducted based on the calculation results. The analysis results are validated by simulation results. The efforts made in this paper will provide researchers with theoretical guidance on choosing appropriate values for (α, β, χ, γ) in this exponential model.
A complete and harmonized fundamental circuit relational graph with four linear and four memory elements is constructed based on some newly defined elements, which provides a guide to developing novel circuit functionalities in the future. In addition to resistors, capacitors, and inductors, which are defined in terms of a linear relationship between charge q, current i, voltage v, and magnetic flux φ, Chua proposed in 1971 a fourth linear circuit element to directly relate φ and q. A nonlinear resistive device defined in memory i–v relation and dubbed memristor, was later attributed to such an element and has been realized in various material structures. Here we clarify that the memristor is not the true fourth fundamental circuit element but the memory extension to the concept of resistor, in analogy to the extension of memcapacitor to capacitor and meminductor to inductor. Instead, a two-terminal device employing the linear ME effects, termed transtor, directly relates φ and q and should be recognized as the fourth linear element. Moreover, its memory extension, termed memtranstor, is proposed and analyzed here.
To develop real world memristor application circuits, an equivalent circuit model which imitates memductance (memory conductance) of the HP memristor is presented. The equivalent circuit can be used for breadboard experiments for various application circuit designs of memristor. Based on memductance of the realistic HP memristor and Chua's circuit a new chaotic oscillator is designed. Some basic dynamical behaviors of the oscillator, including equilibrium set, Lyapunov exponent spectrum, and bifurcations with various circuit parameters are investigated theoretically and numerically. To confirm the correction of the proposed oscillator an analog circuit is designed using the proposed equivalent circuit model of an HP memristor, and the circuit simulations and the experimental results are given.
The memristor has broad application prospects in many fields, while in many cases, those fields require accurate impedance control. The nonlinear model is of great importance for realizing memristance control accurately, but the implementing complexity caused by iteration has limited the actual application of this model. Considering the approximate linear characteristics at the middle region of the memristance-charge (M-q) curve of the nonlinear model, this paper proposes a memristance controlling approach, which is achieved by linearizing the middle region of the M-q curve of the nonlinear memristor, and establishes the linear relationship between memristances M and input excitations so that it can realize impedance control precisely by only adjusting input signals briefly. First, it analyzes the feasibility for linearizing the middle part of the M-q curve of the memristor with a nonlinear model from the qualitative perspective. Then, the linearization equations of the middle region of the M-q curve is constructed by using the shift method, and under a sinusoidal excitation case, the analytical relation between the memristance M and the charge time t is derived through the Taylor series expansions. At last, the performance of the proposed approach is demonstrated, including the linearizing capability for the middle part of the M-q curve of the nonlinear model memristor, the controlling ability for memristance M, and the influence of input excitation on linearization errors.
Modeling a memristor is an effective way to explore the memristor properties due to the fact that the memristor devices are still not commercially available for common researchers. In this paper, a physical memristive device is assumed to exist whose ionic drift direction is perpendicular to the direction of the applied voltage, upon which, corresponding to the HP charge-controlled memristor model, a novel threshold flux-controlled memristor model with a window function is proposed. The fingerprints of the proposed model are analyzed. Especially, a practical equivalent circuit of the proposed model is realized, from which the corresponding experimental fingerprints are captured. The equivalent circuit of the threshold memristor model is appropriate for various memristors based breadboard experiments.
A novel mapping equivalent approach is proposed in this paper, which can be used for analyzing and realizing a memristor-based dynamical circuit equivalently by a nonlinear dynamical circuit with the same topologies and circuit parameters. A memristor-based chaotic circuit and the corresponding Chua's chaotic circuit with two output differentiators are taken as examples to illustrate this approach. Equivalent dynamical analysis and realization of the memristor-based chaotic circuit are performed by using Chua's chaotic circuit. The results indicate that the outputs of memristor-based chaotic circuit and the corresponding outputs of Chua's chaotic circuit have identical dynamics. The proposed approach verified by numerical simulations and experimental observations is useful in designing and analyzing memristor-based dynamical circuits.
In this paper, a concise but effective interface circuit for transforming a memristor into meminductive and memcapacitive systems is designed. This newly proposed interface circuit, constructed by only two current conveyors, is equipped with three available ports, which can provide six connecting combinations in terms of one resistor, one capacitor, and one memristor. For the sake of confirming the design effectiveness, theoretical and simulation discussions are hence introduced and all the experimental waveforms provide conclusive evidence to validate the correctness of these new mutators. The most attractive features of this new interface circuit are the floating terminals and convenient practical implementation.
The recent published experimental data of titanium oxide memristor devices which are tested under the same experimental conditions exhibit the strange instability and complexity of these devices. Such undesired characteristics preclude the understanding of the device conductive processes and the memristor-based practical applications. The possibility of the coexistence of dopant drift and tunnel barrier conduction in a memristor provides preliminary explanations for the undesired characteristics. However, current research lacks detailed discussion about the coexistence case. In this paper, dopant drift and tunnel barrier-based theories are first analyzed for studying the relations between parameters and physical variables which affect characteristics of memristors, and then the influences of each parameter change on the conductive behaviors in the single and coexistence cases of the two mechanisms are simulated and discussed respectively. The simulation results provide further explanations of the complex device conduction. Theoretical methods of eliminating or reducing the coexistence of the two mechanisms are proposed, in order to increase the stability of the device conduction. This work also provides the support for optimizing the fabrications of memristor devices with excellent performance.
In this paper, the crossing point property of the i-v hysteresis curve in a memristor-capacitor (MC) circuit is analyzed. First, the ideal passive memristor on the crossing point property of i-v hysteresis curve is studied. Based on the analysis, the analytical derivation with respect to the crossing point location of MC circuit is given. Then the example of MC with linear memristance-versus-charge state map is demonstrated to discuss the drift property of cross-point location, caused by the frequency and capacitance value.
Nanocrossbar is a potential memory architecture to integrate memristor to achieve large scale and high density memory. However, based on the currently widely-adopted parallel reading scheme, scalability of the nanocrossbar memory is limited, since the overhead of the reading circuits is in proportion with the size of the nanocrossbar component. In this paper, a multiplexed reading scheme is adopted as the foundation of the discussion. Through HSPICE simulation, we reanalyze scalability of the nanocrossbar memristor memory by investigating the impact of various circuit parameters on the output voltage swing as the memory scales to larger size. We find that multiplexed reading maintains sufficient noise margin in large size nanocrossbar memristor memory. In order to improve the scalability of the memory, memristors with nonlinear I–V characteristics and high LRS (low resistive state) resistance should be adopted.
This paper analyzes the crossing point property of the i-v hysteresis curve in MC circuit. Firstly, it studies the ideal passive memristor on the crossing point property of i-v hysteresis curve. Based on the analysis, the analytical derivation to the crossing point location of MC circuit is given. Then the example of MC with linear memristance-versus-charge state map is demonstrated to discuss the drift property of cross-point location caused by the frequency and capacitance value.
Nano-scale titanium oxide memristors exhibit complex conductive characteristics, which have already been proved by existing research. One possible reason for this is that more than one mechanism exists, and together they codetermine the conductive behaviors of the memristor. In this paper, we first analyze the theoretical base and conductive process of a memristor, and then propose a compatible circuit model to discuss and simulate the coexistence of the dopant drift and tunnel barrier-based mechanisms. Simulation results are given and compared with the published experimental data to prove the possibility of the coexistence. This work provides a practical model and some suggestions for studying the conductive mechanisms of memristors.
In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V-I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simulations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.
A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example, upon which the voltage-current relationships (VCRs) between two parallel memristive circuits, i.e., parallel memristor and capacitor circuit (called as parallel MC circuit), and parallel memristor and inductor circuit (called as parallel ML circuit), are investigated. The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters, and the frequency and amplitude of the sinusoidal voltage stimulus. Equivalent circuit model of the memristor is built, upon which the circuit simulations and experimental measurements of both parallel MC circuit and parallel ML circuit are performed, of which the results verify the theoretical analysis results.
This paper is concerned with the exponential synchronization problem of coupled memristive neural networks. In contrast to general neural networks, memristive neural networks exhibit state-dependent switching behaviors due to the physical properties of memristors. Under a mild topology condition, it is proved that a small fraction of controlled subsystems can efficiently synchronize the coupled systems. The pinned subsystems are identified via a search algorithm. Moreover, the information exchange network needs not to be undirected or strongly connected. Finally, two numerical simulations are performed to verify the usefulness and effectiveness of our results.
According to the Lyapunov stability theorem, a new scheme of general hybrid projective complete dislocated synchronization with non-derivative and derivative coupling based on parameters identification is proposed under the framework of drive-response systems. Every state variable of the response system equals the summation of hybrid drive systems in the previous hybrid synchronization, however, every state variable of the drive system equals the summation of hybrid response systems while evolving with time in our method. Complete synchronization, hybrid dislocated synchronization, projective synchronization, non-derivative and derivative coupling, and parameters identification are included as its special item. Lorenz chaotic system, Rössler chaotic system, the memristor chaotic oscillator system, and hyperchaotic Lü system are discussed to show the effectiveness of the proposed methods.
A novel inductance-free nonlinear oscillator circuit with a single bifurcation parameter is presented in this paper. This circuit is composed of a twin-T oscillator, a passive RC network, and a flux-controlled memristor. With the increase of control parameter, the circuit exhibits complicated chaotic behaviors from double periodicity. The dynamic properties of the circuit are demonstrated by means of equilibrium stability, Lyapunov exponent spectrum, and bifurcation diagram. In order to confirm the occurrence of chaotic behavior in the circuit, an analog realization of the piecewise-linear flux controlled memristor is proposed and Pspice simulation is conducted on the resulting circuit.
In this paper, an analogue model of a memristor using a light-dependent resistor (LDR) is presented. This model can be simplified into two parts: a control circuit and a variable resistor. It can be used to easily verify theoretical presumptions about the switching properties of memristors. This LDR-based memristor model can also be used in both simulations and experiments for future research into memristor applications. The paper includes mathematical models, simulations, and experimental results.
With CMOS technologies approaching the scaling ceiling, novel memory technologies have thrived in recent years, among which the memristor is a rather promising candidate for future resistive memory (RRAM). Memristor's potential to store multiple bits of information as different resistance levels allows its application in multilevel cell (MCL) technology, which can significantly increase the memory capacity. However, most existing memristor models are built for binary or continuous memristance switching. In this paper, we propose the simulation program with integrated circuits emphasis (SPICE) modeling of charge-controlled and flux-controlled memristors with multilevel resistance states based on the memristance versus state map. In our model, the memristance switches abruptly between neighboring resistance states. The proposed model allows users to easily set the number of the resistance levels as parameters, and provides the predicability of resistance switching time if the input current/voltage waveform is given. The functionality of our models has been validated in HSPICE. The models can be used in multilevel RRAM modeling as well as in artificial neural network simulations.
As the fourth passive circuit component, a memristor is a nonlinear resistor that can “remember” the amount of charge passing through it. The characteristic of “remembering” the charge and non-volatility makes memristors great potential candidates in many fields. Nowadays, only a few groups have the ability to fabricate memristors, and most researchers study them by theoretic analysis and simulation. In this paper, we first analyse the theoretical base and characteristics of memristors, then use a simulation program with integrated circuit emphasis as our tool to simulate the theoretical model of memristors and change the parameters in the model to see the influence of each parameter on the characteristics. Our work supplies researchers engaged in memristor-based circuits with advice on how to choose the proper parameters.
In this paper, a practical equivalent circuit of an active flux-controlled memristor characterized by smooth piecewise-quadratic nonlinearity is designed and an experimental chaotic memristive circuit is implemented. The chaotic memristive circuit has an equilibrium set and its stability is dependent on the initial state of the memristor. The initial state-dependent and the circuit parameter-dependent dynamics of the chaotic memristive circuit are investigated via phase portraits, bifurcation diagrams and Lyapunov exponents. Both experimental and simulation results validate the proposed equivalent circuit realization of the active flux-controlled memristor.
This paper presents a new smooth memristor oscillator,
which is derived from Chua's oscillator by replacing Chua's diode
with a flux-controlled memristor and a negative conductance. Novel
parameters and initial conditions are dependent upon dynamical behaviours
such as transient chaos and stable chaos with an intermittence
period and are found in the smooth memristor oscillator. By using
dynamical analysis approaches including time series, phase portraits
and bifurcation diagrams, the dynamical behaviours of the proposed
memristor oscillator are effectively investigated in this paper.