%A Da Ma(马达), Xiao-Rong Luo(罗小蓉), Jie Wei(魏杰), Qiao Tan(谭桥), Kun Zhou(周坤), Jun-Feng Wu(吴俊峰) %T Ultra-low specific on-resistance high-voltage vertical double diffusion metal-oxide-semiconductor field-effect transistor with continuous electron accumulation layer %0 Journal Article %D 2016 %J Chin. Phys. B %R 10.1088/1674-1056/25/4/048502 %P 48502-048502 %V 25 %N 4 %U {https://cpb.iphy.ac.cn/CN/abstract/article_118533.shtml} %8 2016-04-05 %X A new ultra-low specific on-resistance (Ron,sp) vertical double diffusion metal-oxide-semiconductor field-effect transistor (VDMOS) with continuous electron accumulation (CEA) layer, denoted as CEA-VDMOS, is proposed and its new current transport mechanism is investigated. It features a trench gate directly extended to the drain, which includes two PN junctions. In on-state, the electron accumulation layers are formed along the sides of the extended gate and introduce two continuous low-resistance current paths from the source to the drain in a cell pitch. This mechanism not only dramatically reduces the Ron,sp but also makes the Ron,sp almost independent of the n-pillar doping concentration (Nn). In off-state, the depletion between the n-pillar and p-pillar within the extended trench gate increases the Nn, and further reduces the Ron,sp. Especially, the two PN junctions within the trench gate support a high gate-drain voltage in the off-state and on-state, respectively. However, the extended gate increases the gate capacitance and thus weakens the dynamic performance to some extent. Therefore, the CEA-VDMOS is more suitable for low and medium frequencies application. Simulation indicates that the CEA-VDMOS reduces the Ron,sp by 80% compared with the conventional super-junction VDMOS (CSJ-VDMOS) at the same high breakdown voltage (BV).