A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer

doi:10.1088/1674-1056/19/7/077306

Abstract A novel partial silicon-on-insulator (PSOI) high voltage device with a low-k (relative permittivity) dielectric buried layer (LK PSOI) and its breakdown mechanism are presented and investigated by MEDICI. At a low k value the electric field strength in the dielectric buried layer (E_I) is enhanced and a Si window makes the substrate share the vertical drop, resulting in a high vertical breakdown voltage; in the lateral direction, a high electric field peak is introduced at the Si window, which modulates the electric field distribution in the SOI layer; consequently, a high breakdown voltage (BV) is obtained. The values of E_I and BV of LK PSOI with k_I= 2 on a 2 μm thick SOI layer over 1 μm thick buried layer are enhanced by 74% and 19%, respectively, compared with those of the conventional PSOI. Furthermore, the Si window also alleviates the self-heating effect.

Keywords: silicon-on-insulator low k dielectric electric field breakdown voltage

Revised: 01 February 2010
Accepted manuscript online:

PACS:	85.30.Tv	(Field effect devices)
	85.50.-n	(Dielectric, ferroelectric, and piezoelectric devices)
	77.22.Ch	(Permittivity (dielectric function))
	77.22.Jp	(Dielectric breakdown and space-charge effects)

Fund: Projects supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 60976060), the National Laboratory of Analog Integrated Circuit (Grant No. 9140C0903070904), and the Youth Teacher Foundation of the University of Electronic Science and Technology of China (Grant No. jx0721).

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Luo Xiao-Rong (罗小蓉), Wang Yuan-Gang (王元刚), Deng Hao (邓浩), Florin Udrea A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer 2010 Chin. Phys. B 19 077306

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A novel partial silicon on insulator high voltage LDMOS with low-k dielectric buried layer

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