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Chin. Phys. B, 2008, Vol. 17(2): 685-689    DOI: 10.1088/1674-1056/17/2/054
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

A novel 10-nm physical gate length double-gate junction field effect transistor

Hou Xiao-Yu(侯晓宇)a), Huang Ru(黄如)a),, Chen Gang(陈刚)a), Liu Sheng(刘晟)a), Zhang Xing(张兴)a), Yu Bin(俞滨)b), and Wang Yang-Yuan(王阳元)a)
a Institute of Microelectronics, Peking University, Beijing 100871, China; b NASA Ames Research Center, Moffett Field, CA 94035,USA
Abstract  A novel double-gate (DG) junction field effect transistor (JFET) with depletion operation mode is proposed in this paper. Compared with the conventional DG MOSFET, the novel DG JFET can achieve excellent performance with square body design, which relaxes the requirement on silicon film thickness of DG devices. Moreover, due to the structural symmetry, both p-type and n-type devices can be realized on exactly the same structure, which greatly simplifies integration. It can reduce the delay by about 60% in comparison with the conventional DG MOSFETs.
Keywords:  MOSFET      double-gate MOSFET      depletion operation mode  
Received:  24 May 2007      Revised:  02 July 2007      Accepted manuscript online: 
PACS:  85.30.Tv (Field effect devices)  
  85.30.De (Semiconductor-device characterization, design, and modeling)  
Fund: Project supported by the National Natural Science Foundation of China (Grant No 60625403), by the Special Funds for Major State Basic Research (973) Projects and NCET program.

Cite this article: 

Hou Xiao-Yu(侯晓宇), Huang Ru(黄如), Chen Gang(陈刚), Liu Sheng(刘晟), Zhang Xing(张兴), Yu Bin(俞滨), and Wang Yang-Yuan(王阳元) A novel 10-nm physical gate length double-gate junction field effect transistor 2008 Chin. Phys. B 17 685

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