Gate-to-body tunneling current model for silicon-on-insulator MOSFETs

doi:10.1088/1674-1056/22/10/108501

Abstract A gate-to-body tunneling current model for silicon-on-insulator (SOI) devices is simulated. As verified by the measured data, the model, considering both gate voltage and drain voltage dependence as well as image force-induced barrier low effect, provides a better prediction of the tunneling current and gate-induced floating body effect than the BSIMSOI4 model. A delayed gate-induced floating body effect is also predicted by the model.

Keywords: gate-to-body tunneling gate-induced floating body effect image force-induced barrier low effect silicon-on-insulator

Received: 17 December 2012
Revised: 22 April 2013
Accepted manuscript online:

PACS:	85.30.De	(Semiconductor-device characterization, design, and modeling)
	73.40.Qv	(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

Corresponding Authors: Chen Jing
E-mail: jchen@mail.sim.ac.cn

Cite this article:

Wu Qing-Qing (伍青青), Chen Jing (陈静), Luo Jie-Xin (罗杰馨), Lü Kai (吕凯), Yu Tao (余涛), Chai Zhan (柴展), Wang Xi (王曦) Gate-to-body tunneling current model for silicon-on-insulator MOSFETs 2013 Chin. Phys. B 22 108501

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Gate-to-body tunneling current model for silicon-on-insulator MOSFETs

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