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Chin. Phys. B, 2009, Vol. 18(1): 309-314    DOI: 10.1088/1674-1056/18/1/050
CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES Prev   Next  

Effect of substrate bias on negative bias temperature instability of ultra-deep sub-micro p-channel metal--oxide--semiconductor field-effect transistors

Cao Yan-Rong(曹艳荣), Hao Yue(郝跃), Ma Xiao-Hua(马晓华), and Hu Shi-Gang(胡仕刚)
School of Microelectronics, Xidian University, Xi'an 710071, China Key Laboratory of Ministry of Education for Wide Band-Gap Semiconductor Materials and Devices, Xi'an 710071, China
Abstract  The effect of substrate bias on the degradation during applying a negative bias temperature (NBT) stress is studied in this paper. With a smaller gate voltage stress applied, the degradation of negative bias temperature instability (NBTI) is enhanced, and there comes forth an inflexion point. The degradation pace turns larger when the substrate bias is higher than the inflexion point. The substrate hot holes can be injected into oxide and generate additional oxide traps, inducing an inflexion phenomenon. When a constant substrate bias stress is applied, as the gate voltage stress increases, an inflexion comes into being also. The higher gate voltage causes the electrons to tunnel into the substrate from the poly, thereby generating the electron--hole pairs by impact ionization. The holes generated by impact ionization and the holes from the substrate all can be accelerated to high energies by the substrate bias. More additional oxide traps can be produced, and correspondingly, the degradation is strengthened by the substrate bias. The results of the alternate stress experiment show that the interface traps generated by the hot holes cannot be annealed, which is different from those generated by common holes.
Keywords:  negative bias temperature instability (NBTI)      substrate bias      hot holes      oxide traps  
Received:  20 June 2008      Revised:  07 September 2008      Accepted manuscript online: 
PACS:  85.30.Tv (Field effect devices)  
  85.30.De (Semiconductor-device characterization, design, and modeling)  
Fund: Project supported by the National Natural Science Foundation of China (Grant Nos 60376024, 60736033 and 60506020) and the National High Technology Research and Development Program of China (Grant No 2003AA1Z1630).

Cite this article: 

Cao Yan-Rong(曹艳荣), Hao Yue(郝跃), Ma Xiao-Hua(马晓华), and Hu Shi-Gang(胡仕刚) Effect of substrate bias on negative bias temperature instability of ultra-deep sub-micro p-channel metal--oxide--semiconductor field-effect transistors 2009 Chin. Phys. B 18 309

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