Abstract In this paper, a complementary metal--oxide semiconductor (CMOS)-compatible silicon substrate optimization technique is proposed to achieve effective isolation. The selective growth of porous silicon is used to effectively suppress the substrate crosstalk. The isolation structures are fabricated in standard CMOS process and then this post-CMOS substrate optimization technique is carried out to greatly improve the performances of crosstalk isolation. Three-dimensional electro-magnetic simulation is implemented to verify the obvious effect of our substrate optimization technique. The morphologies and growth condition of porous silicon fabricated have been investigated in detail. Furthermore, a thick selectively grown porous silicon (SGPS) trench for crosstalk isolation has been formed and about 20dB improvement in substrate isolation is achieved. These results demonstrate that our post-CMOS SGPS technique is very promising for RF IC applications.
Received: 04 September 2007
Revised: 18 January 2008
Accepted manuscript online:
(Semiconductor-device characterization, design, and modeling)
Fund: Project supported
by the Major Program of the National Natural Science Foundation of
China (Grant No 60625403) and the Collaborative Project
between Intel Corporation and Peking University.
Cite this article:
Li Chen(李琛), Liao Huai-Lin (廖怀林),Huang Ru(黄如), and Wang Yang-Yuan (王阳元) A CMOS-compatible silicon substrate optimization technique and its application in radio frequency crosstalk isolation 2008 Chin. Phys. B 17 2730
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