Simulation study of high voltage GaN MISFETs with embedded PN junction

doi:10.1088/1674-1056/ab90f7

Abstract

In this paper, we propose a new enhanced GaN MISFET with embedded pn junction, i.e., EJ-MISFET, to enhance the breakdown voltage. The embedded pn junction is used to improve the simulated device electric field distribution between gate and drain, thus achieving an enhanced breakdown voltage (BV). The proposed simulated device with L_GD=15 μm presents an excellent breakdown voltage of 2050 V, which is attributed to the improvement of the device electric field distribution between gate and drain. In addition, the ON-resistance (R_ON) of 15.37 Ω·mm and Baliga's figure of merit of 2.734 GW·cm^-2 are achieved in the optimized EJ-MISFET. Compared with the field plate conventional GaN MISFET (FPC-MISFET) without embedded pn junction structure, the proposed simulated device increases the BV by 32.54% and the Baliga's figure of merit is enhanced by 71.3%.

Keywords: TCAD Baliga's figure of merit (BFOM) breakdown voltage (BV)

Received: 24 February 2020
Revised: 23 April 2020
Accepted manuscript online:

PACS:	07.05.Tp	(Computer modeling and simulation)
	94.20.Ss	(Electric fields; current system)
	51.50.+v	(Electrical properties)
	84.30.Jc	(Power electronics; power supply circuits)

Fund:

Project supported by the National Natural Science Foundation of China (Grant No. 61774052) and the Excellent Youth Foundation of Zhejiang Province, China (Grant No. LR17F040001).

Corresponding Authors: Ying Wang
E-mail: wangying7711@yahoo.com

Cite this article:

Xin-Xing Fei(费新星), Ying Wang(王颖), Xin Luo(罗昕), Cheng-Hao Yu(于成浩) Simulation study of high voltage GaN MISFETs with embedded PN junction 2020 Chin. Phys. B 29 080701

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Simulation study of high voltage GaN MISFETs with embedded PN junction

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