| CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES |
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Variable-K double trenches SOI LDMOS with high-concentration P-pillar |
| Lijuan Wu(吴丽娟), Lin Zhu(朱琳), Xing Chen(陈星) |
| The Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering, School of Physics&Electronic Science, Changsha University of Science&Technology, Changsha 410114, China |
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Abstract A variable-K trenches silicon-on-insulator (SOI) lateral diffused metal-oxide-semiconductor field-effect transistor (MOSFET) with a double conductive channel is proposed based on the enhancement of low dielectric constant media to electric fields. The device features variable-K dielectric double trenches and a P-pillar between the trenches (VK DT-P LDMOS). The low-K dielectric layer on the surface increases electric field of it. Adding a variable-K material introduces a new electric field peak to the drift region, so as to optimize electric field inside the device. Introduction of the high-concentration vertical P-pillar between the two trenches effectively increases doping concentration of the drift region and maintains charge balance inside it. Thereby, breakdown voltage (BV) of the device is increased. The double conductive channels provide two current paths that significantly reduce specific on-resistance (Ron,sp). Simulation results demonstrate that a 17-μm-length device can achieve a BV of 554 V and a low on-resistance of 13.12 mΩ·cm2. The Ron,sp of VK DT-P LDMOS is reduced by 78.9% compared with the conventional structure.
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Received: 06 November 2019
Revised: 06 March 2020
Accepted manuscript online:
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PACS:
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77.55.df
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(For silicon electronics)
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85.30.De
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(Semiconductor-device characterization, design, and modeling)
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51.50.+v
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(Electrical properties)
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| Fund: Project supported by the Scientific Research Fund of Hunan Provincial Education Department, China (Grant No. 19K001). |
Corresponding Authors:
Lijuan Wu
E-mail: 1329456829@qq.com
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Cite this article:
Lijuan Wu(吴丽娟), Lin Zhu(朱琳), Xing Chen(陈星) Variable-K double trenches SOI LDMOS with high-concentration P-pillar 2020 Chin. Phys. B 29 057701
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