Double-gate-all-around tunnel field-effect transistor

doi:10.1088/1674-1056/26/7/078502

Abstract

In this work, a double-gate-all-around tunneling field-effect transistor is proposed. The performance of the novel device is studied by numerical simulation. The results show that with a thinner body and an additional core gate, the novel device achieves a steeper subthreshold slope, less susceptibility to the short channel effect, higher on-state current, and larger on/off current ratio than the traditional gate-all-around tunneling field-effect transistor. The excellent performance makes the proposed structure more attractive to further dimension scaling.

Keywords: gate-all-around (GAA) tunnel field effect transistor (TFET) drain induced barrier thinning (DIBT)

Received: 18 January 2017
Revised: 06 April 2017
Accepted manuscript online:

PACS:	85.30.Mn	(Junction breakdown and tunneling devices (including resonance tunneling devices))
	85.30.Tv	(Field effect devices)
	85.30.De	(Semiconductor-device characterization, design, and modeling)

Fund:

Project supported by the National Natural Science Foundation of China (Grant Nos.61176038 and 61474093),the Science and Technology Planning Project of Guangdong Province,China (Grant No.2015A010103002),and the Technology Development Program of Shanxi Province,China (Grant No.2016GY075).

Corresponding Authors: Zun-Chao Li
E-mail: zcli@mail.xjtu.edu.cn

Cite this article:

Wen-Hao Zhang(张文豪), Zun-Chao Li(李尊朝), Yun-He Guan(关云鹤), Ye-Fei Zhang(张也非) Double-gate-all-around tunnel field-effect transistor 2017 Chin. Phys. B 26 078502

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