中国物理B ›› 2016, Vol. 25 ›› Issue (8): 87306-087306.doi: 10.1088/1674-1056/25/8/087306

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇 下一篇

Hao Xu(徐昊), Hong Yang(杨红), Yan-Rong Wang(王艳蓉), Wen-Wu Wang(王文武), Wei-Chun Luo(罗维春), Lu-Wei Qi(祁路伟), Jun-Feng Li(李俊峰), Chao Zhao(赵超), Da-Peng Chen(陈大鹏), Tian-Chun Ye(叶甜春)

- Key Laboratory of Microelectronics Devices & Integrated Technology, Institute of MicroElectronics, Chinese Academy of Sciences, Beijing 100029, China

Hao Xu(徐昊), Hong Yang(杨红), Yan-Rong Wang(王艳蓉), Wen-Wu Wang(王文武), Wei-Chun Luo(罗维春), Lu-Wei Qi(祁路伟), Jun-Feng Li(李俊峰), Chao Zhao(赵超), Da-Peng Chen(陈大鹏), Tian-Chun Ye(叶甜春)

**摘要： **High-*k* metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes. The reliability of thin dielectric films becomes a limitation to device manufacturing, especially to the breakdown characteristic. In this work, a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up, and the intrinsic relation between time to breakdown and trap generation rate *R* is studied by TDDB simulation. It is found that all degradation factors, such as trap generation rate time exponent *m*, Weibull slope *β* and percolation factor *s*, each could be expressed as a function of trap density time exponent *α*. Based on the percolation relation and power law lifetime projection, a temperature related trap generation model is proposed. The validity of this model is confirmed by comparing with experiment results. For other device and material conditions, the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.

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中图分类号:
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(Metal-insulator-semiconductor structures (including semiconductor-to-insulator))

- 73.40.Qv