中国物理B ›› 2016, Vol. 25 ›› Issue (7): 77201-077201.doi: 10.1088/1674-1056/25/7/077201

• CONDENSED MATTER: ELECTRONIC STRUCTURE, ELECTRICAL, MAGNETIC, AND OPTICAL PROPERTIES • 上一篇    下一篇

Improving breakdown voltage performance of SOI power device with folded drift region

Qi Li(李琦), Hai-Ou Li(李海鸥), Ping-Jiang Huang(黄平奖), Gong-Li Xiao(肖功利), Nian-Jiong Yang(杨年炯)   

  1. 1 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China;
    2 Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing, Guilin University of Electronic Technology, Guilin 541004, China;
    3 Guangxi Experiment Center of Information Science, Guilin 541004, China;
    4 Guangxi Key Laboratory of Automobile Components and Vehicle Technology, Guangxi University of Science and Technology, Liuzhou 545006, China
  • 收稿日期:2015-11-05 修回日期:2016-03-11 出版日期:2016-07-05 发布日期:2016-07-05
  • 通讯作者: Hai-Ou Li, Nian-Jiong Yang E-mail:lqmoon@guet.edu.cn;5041433@qq.com
  • 基金资助:
    Project supported by the Guangxi Natural Science Foundation of China (Grant Nos. 2013GXNSFAA019335 and 2015GXNSFAA139300), Guangxi Experiment Center of Information Science of China (Grant No. YB1406), Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing of China, Key Laboratory of Cognitive Radio and Information Processing (Grant No. GXKL061505), Guangxi Key Laboratory of Automobile Components and Vehicle Technology of China (Grant No. 2014KFMS04), and the National Natural Science Foundation of China (Grant Nos. 61361011, 61274077, and 61464003).

Improving breakdown voltage performance of SOI power device with folded drift region

Qi Li(李琦)1, Hai-Ou Li(李海鸥)2, Ping-Jiang Huang(黄平奖)2, Gong-Li Xiao(肖功利)3, Nian-Jiong Yang(杨年炯)4   

  1. 1 Guangxi Key Laboratory of Precision Navigation Technology and Application, Guilin University of Electronic Technology, Guilin 541004, China;
    2 Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing, Guilin University of Electronic Technology, Guilin 541004, China;
    3 Guangxi Experiment Center of Information Science, Guilin 541004, China;
    4 Guangxi Key Laboratory of Automobile Components and Vehicle Technology, Guangxi University of Science and Technology, Liuzhou 545006, China
  • Received:2015-11-05 Revised:2016-03-11 Online:2016-07-05 Published:2016-07-05
  • Contact: Hai-Ou Li, Nian-Jiong Yang E-mail:lqmoon@guet.edu.cn;5041433@qq.com
  • Supported by:
    Project supported by the Guangxi Natural Science Foundation of China (Grant Nos. 2013GXNSFAA019335 and 2015GXNSFAA139300), Guangxi Experiment Center of Information Science of China (Grant No. YB1406), Guangxi Key Laboratory of Wireless Wideband Communication and Signal Processing of China, Key Laboratory of Cognitive Radio and Information Processing (Grant No. GXKL061505), Guangxi Key Laboratory of Automobile Components and Vehicle Technology of China (Grant No. 2014KFMS04), and the National Natural Science Foundation of China (Grant Nos. 61361011, 61274077, and 61464003).

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摘要： A novel silicon-on-insulator (SOI) high breakdown voltage (BV) power device with interlaced dielectric trenches (IDT) and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer, which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges (holes) at the corner of IDT. The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.

关键词: interlaced dielectric trenches, folded drift region, breakdown voltage, N/P pillars

Abstract: A novel silicon-on-insulator (SOI) high breakdown voltage (BV) power device with interlaced dielectric trenches (IDT) and N/P pillars is proposed. In the studied structure, the drift region is folded by IDT embedded in the active layer, which results in an increase of length of ionization integral remarkably. The crowding phenomenon of electric field in the corner of IDT is relieved by the N/P pillars. Both traits improve two key factors of BV, the ionization integral length and electric field magnitude, and thus BV is significantly enhanced. The electric field in the dielectric layer is enhanced and a major portion of bias is borne by the oxide layer due to the accumulation of inverse charges (holes) at the corner of IDT. The average value of the lateral electric field of the proposed device reaches 60 V/μm with a 10 μm drift length, which increases by 200% in comparison to the conventional SOI LDMOS, resulting in a breakdown voltage of 607 V.

Key words: interlaced dielectric trenches, folded drift region, breakdown voltage, N/P pillars

中图分类号:  (Elemental semiconductors)

  • 72.80.Cw
73.40.Qv (Metal-insulator-semiconductor structures (including semiconductor-to-insulator))