中国物理B ›› 2014, Vol. 23 ›› Issue (3): 38401-038401.doi: 10.1088/1674-1056/23/3/038401

• INTERDISCIPLINARY PHYSICS AND RELATED AREAS OF SCIENCE AND TECHNOLOGY • 上一篇    下一篇

Reduction of signal reflection along through silicon via channel in high-speed three-dimensional integration circuit

刘晓贤, 朱樟明, 杨银堂, 王凤娟, 丁瑞雪   

  1. Microelectronics School, Xidian University, Xi’an 710071, China
  • 收稿日期:2013-05-21 修回日期:2013-07-18 出版日期:2014-03-15 发布日期:2014-03-15
  • 基金资助:
    Project supported by the National Natural Science Foundation of China (Grant No. 61204044).

Reduction of signal reflection along through silicon via channel in high-speed three-dimensional integration circuit

Liu Xiao-Xian (刘晓贤), Zhu Zhang-Ming (朱樟明), Yang Yin-Tang (杨银堂), Wang Feng-Juan (王凤娟), Ding Rui-Xue (丁瑞雪)   

  1. Microelectronics School, Xidian University, Xi’an 710071, China
  • Received:2013-05-21 Revised:2013-07-18 Online:2014-03-15 Published:2014-03-15
  • Contact: Liu Xiao-Xian E-mail:liudou132@163.com
  • Supported by:
    Project supported by the National Natural Science Foundation of China (Grant No. 61204044).

摘要: The through silicon via (TSV) technology has proven to be the critical enabler to realize a three-dimensional (3D) gigscale system with higher performance but shorter interconnect length. However, the received digital signal after transmission through a TSV channel, composed of redistribution layers (RDLs), TSVs, and bumps, is degraded at a high data-rate due to the non-idealities of the channel. We propose the Chebyshev multisection transformers to reduce the signal reflection of TSV channel when operating frequency goes up to 20 GHz, by which signal reflection coefficient (S11) and signal transmission coefficient (S21) are improved remarkably by 150% and 73.3%, respectively. Both the time delay and power dissipation are also reduced by 4% and 13.3%, respectively. The resistance-inductance-conductance-capacitance (RLGC) elements of the TSV channel are iterated from scattering (S)-parameters, and the proposed method of weakening the signal reflection is verified using high frequency simulator structure (HFSS) simulation software by Ansoft.

关键词: three-dimensional integrated circuit, through silicon via channel, signal reflection, S-parameters

Abstract: The through silicon via (TSV) technology has proven to be the critical enabler to realize a three-dimensional (3D) gigscale system with higher performance but shorter interconnect length. However, the received digital signal after transmission through a TSV channel, composed of redistribution layers (RDLs), TSVs, and bumps, is degraded at a high data-rate due to the non-idealities of the channel. We propose the Chebyshev multisection transformers to reduce the signal reflection of TSV channel when operating frequency goes up to 20 GHz, by which signal reflection coefficient (S11) and signal transmission coefficient (S21) are improved remarkably by 150% and 73.3%, respectively. Both the time delay and power dissipation are also reduced by 4% and 13.3%, respectively. The resistance-inductance-conductance-capacitance (RLGC) elements of the TSV channel are iterated from scattering (S)-parameters, and the proposed method of weakening the signal reflection is verified using high frequency simulator structure (HFSS) simulation software by Ansoft.

Key words: three-dimensional integrated circuit, through silicon via channel, signal reflection, S-parameters

中图分类号:  (Electronic circuits)

  • 84.30.-r
84.30.Bv (Circuit theory)